The present invention relates to an active-matrix liquid crystal display (LCD) device and a method of fabricating the same, and more particularly, to an array substrate having thin film transistors for the active-matrix LCD device and the method of fabricating the array substrate.
An active matrix type LCD device, employing a thin film transistor (TFT) as a switching device, is typically made up of two array substrates with a liquid crystal material interposed therebetween. One substrate, which is the array substrate, has a matrix array of TFTs and pixel electrodes. The opposing substrate, which is the color filter substrate, includes a light-shielding film (also known as the black matrix), a color filter, and a common electrode.
For the array substrate, an inverted staggered type TFT is widely employed because of its simple structure and superior quality. The inverted staggered type TFT is further divided into a back-channel-etch type and an etching-stopper type, which are differentiated according to the methods of forming a channel in the TFT. Between the two, the back-channel-etch type has a simpler structure.
A typical array substrate manufacturing process requires repeated steps of depositing and patterning various layers. The patterning steps involve photolithography masks. Each photolithography step is facilitated using one mask, and the number of masks used in the fabrication process is a critical factor in determining the number of patterning steps. Namely, the production cost depends heavily on the number of masks used in the manufacturing process.
Referring to the attached drawings, a back-channel-etch type structure of an array substrate of an LCD device manufactured by a conventional method will be explained in detail.
As shown in FIG. 1, the LCD device 20 includes an array substrate 2, a color filter substrate 4 opposing the array substrate 2, a liquid crystal 10 interposed therebetween, and a sealant 6 formed at the periphery of the gap between the two substrates 2 and 4. The sealant 6 prevents the liquid crystal 10 from leaking out of the LCD device 20.
The array substrate 2 includes a substrate 1, a TFT 5, and a pixel electrode 14. The TFT 5 acts as a switching element for changing the orientation of the liquid crystal 10, and the pixel electrode 14 is used as a first electrode to apply electric field to the liquid crystal 10.
The color filter substrate 4 includes a substrate 11, a color filter 8, and a common electrode 12. The color filter 8 is used for displaying colors and the common electrode 12 is used as a second electrode to apply an electric field to the liquid crystal 10.
Referring to FIG. 2, a detailed description of the structure and operation of the array substrate 2 will be provided.
On the substrate 1 of the array substrate 2, a gate line 22 is horizontally formed and a data line 24 is formed perpendicular thereto. The pixel electrode 14 is formed within the rectangular area defined by the gate and data lines 22 and 24. Near the crossing point between the gate and data lines 22 and 24, a portion of the gate line 22 is used as a gate electrode 26. Also, at one end of the gate line 22, a gate pad 18 is positioned and the gate pad contact hole 21 is formed in the gate pad 18.
Further, again near the crossing point, the data line 24 is extended to form a source electrode 28, and a drain electrode 30 is formed spaced apart from the source electrode 28. Also at one end of the data line 24, a data pad 20 is positioned and the data pad contact hole is formed in the data pad 23.
Spaced apart from the drain electrode 30 and over a portion of the gate line 22, an island-shaped capacitor electrode 32 is formed from the same layer as the data line 24. An extended portion of the pixel electrode 14 overlaps the capacitor electrode 32, and together with the extended portion forms a storage capacitor 7 to store electric charges.
A capacitor contact hole 36 is formed above the capacitor electrode 32 to electrically connect the pixel electrode 14 with the capacitor electrode 32. Another portion of the pixel electrode 14 also overlaps a portion of the drain electrode 30, and a drain contact hole 34 is formed at the overlapped portion to electrically connect the drain electrode 30 and the pixel electrode 14.
As explained previously, the TFT 5, which includes the gate, source, and drain electrodes 26, 28 and 30, functions as a switch for applying electric field to the liquid crystal 10 (shown in FIG. 1). That is to say, in operation, if a signal is applied to the gate electrode 26 of the TFT 5, an electrical connection is established between the data line 24 and the pixel electrode 14. When the gate electrode 26 is turned on, electric field is applied to the pixel electrode 14 according to the signal, from an external circuit (not shown), applied to the data line 24 via the data pad 20.
Next, referring to FIGS. 3A to 7A and 3B to 7B, a more detailed description of the structure and the fabrication method of the TFT and the storage capacitor will be provided. FIGS. 3A to 7A illustrate sequential fabrication steps of a cross-section taken along a line “IIIa—IIIa” of FIG. 2, and FIGS. 3B to 7B illustrate corresponding sequential fabrication steps of a cross-section taken along a line “IIIb—IIIb” of FIG. 2.
As shown in FIGS. 3A and 3B, a first metallic material is deposited on a surface of the substrate 1 and patterned with a first mask to form the gate line 22 including the gate electrode 26 and gate pad 18 (shown in FIG. 2). For the first metallic material, a highly conductive metal such as aluminum (Al), aluminum alloy, or molybdenum (Mo) is preferred.
As shown in FIGS. 4A and 4B, a first insulating material is then deposited to form a gate insulating layer 50. On the gate insulating layer 50, a semiconductor material is deposited and doped with impurities and patterned with a second mask to form a semiconductor layer 52 and an ohmic contact layer 54, thereby defining a first intermediate structure.
Then, as shown in FIGS. 5A and 5B, a second metallic material is deposited over the first intermediature structure and patterned with a third mask to form the source and drain electrodes 28 and 30 and the data line 24. The data line 24 is connected with the source electrode 28 (FIG. 5A). At the same time, over a portion of the gate line 22, the second metallic material is used to form the capacitor electrode 32 with the third mask (FIG. 5B).
Afterwards, a portion of the ohmic contact layer 54 is also etched away to form a back channel 56 (FIG. 5A). At this point a second intermediate structure is defined, including the TFT 5 that is made up of the gate, source, and drain electrodes 26, 28, and 30, the semiconductor layer 52, the ohmic contact layer 54, and the back channel 56.
As shown in FIGS. 6A and 6B, over the second intermediate structure, a second insulating material is deposited and patterned with a fourth mask to form a passivation layer 58. The passivation layer 58, protecting the TFT 5 and the capacitor electrode 32, is preferably selected from inorganic-based silicon nitride (SiNx), silicon oxide (SiO2), or organic-based benzocyclobutene (BCB) because they exhibit high light-transmissivity, a moisture-proof quality, and high durability. By patterning the second insulating layer with the fourth mask, the data pad contact, the drain contact, and the capacitor contact holes 23, 34 and 36 are formed, thereby defining a third intermediate structure.
Then as shown in FIGS. 7A and 7B, on the third intermediate structure, a transparent conductive material is deposited and patterned with a fifth mask to form the pixel electrode 14. The pixel electrode 14 is electrically connected with the drain electrode 30 and the capacitor electrode 32 via the drain and capacitor contact holes 34 and 36, respectively. The transparent conductive material is preferably made of indium tin oxide (ITO).
FIG. 8 shows the above-described fabricating process in a block diagram.
In step ST200, the substrate is cleaned to be free from contaminants on the surface.
In step ST210, the gate line 22, gate electrode 26, and gate pad 18 are formed by depositing the first metallic material and patterning the first metal layer by using the first mask.
In step ST220, the gate insulating layer 50 is formed by depositing the first insulating layer and patterned using the second mask. Then the semiconductor and ohmic contact layers 52 and 54, respectively, are formed by sequentially depositing the semiconductor materials and doped semiconductor material and patterning the materials.
In step ST230, the source and drain electrodes 28 and 30, the data line 24, and the capacitor electrode 32 are formed by depositing and patterning the second metallic layer using a third mask.
In step ST240, the back channel 56 is formed by etching the ohmic contact layer 54 using the source and drain electrodes as a mask.
In step ST250, the passivation layer 58 and the data, drain, and the capacitor contact holes (23, 34, and 36 respectively) are formed by depositing and patterning the second insulating layer using a fourth mask.
In step ST260, the pixel electrode 14 is formed by depositing and patterning the transparent conductive material using a fifth mask.
The above-described conventional method of fabricating the array substrate of the LCD device employs five masks. If aluminum is used to form the gate electrode, at least two additional masks are needed to prevent hillocks, i.e., so that gate line defects can be avoided. Accordingly, at least five masking steps, and as many as seven steps, are required in the conventional fabricating process of the array substrate.
As mentioned above, a decrease in masking steps would decrease the manufacturing cost and improve the manufacturing yield.